I. Field of the Disclosure
The technology of the disclosure relates generally to sense amplifiers in memory systems used to read data from memory.
II. Background
Processor-based computer systems include memory for data storage. Memory systems are generally composed of memory bitcells capable of storing data, and corresponding circuitry used to read and write such data. In particular, sense amplifiers (also referred to as “sense amps”) are circuits commonly employed within memory systems to read stored electrical states (e.g., voltage) stored within memory bitcells. The stored electrical states represent logical values or data. More specifically, a sense amplifier is configured to output a logical value (e.g., a logical ‘0’ or logical ‘1’) based on the electrical state of a particular memory bitcell during a memory read operation.
In this regard, FIG. 1 illustrates an exemplary memory system 10 that includes sense amplifiers 12 as part of its read circuitry. For example, the memory system 10 may be a Static Random Access Memory (SRAM) system. Input lines 14 carry signals to allow command and data communications between the memory system 10 and other system components that write or read data to and from a memory cell array 16, which operates as a mass memory device. More specifically, to read data from the memory cell array 16, a memory access request 18 is provided to the memory system 10 by way of the input lines 14. Further, output lines 20 carry signals provided by the memory system 10 as the result of an operation, such as the memory access request 18, to other system components. The memory cell array 16 may be comprised of memory bitcells (not shown). A control system 22 controls the operation of the memory cell array 16. For the memory access request 18, word line drivers 24 in the memory system 10 select a specific row (i.e., page) (not shown) of memory bitcells within the memory cell array 16 based on address information corresponding to the memory access request 18 determined by the control system 22. The address information identifies a specific row in the memory cell array 16 to be read. In response, data from the selected row in the memory cell array 16 is placed onto bit lines 26. In order to read the data placed onto the bit lines 26, the control system 22 communicates a sense signal 28 to the sense amplifiers 12. The sense amplifiers 12 compare the sense signal 28 to the data on the bit lines 26 to provide logical values to the output lines 20. The logical values on the output lines 20 represent the stored states in each corresponding memory bitcell.
While sense amplifiers are commonly associated with SRAM systems, sense amplifiers are also employed within resistive memory systems. As a non-limiting example, sense amplifiers may be used in Magnetic Random Access Memory (MRAM) systems that utilize Spin Transfer Torque (STT) Magnetic Tunnel Junctions (MTJ) (STT-MTJ). In this manner, FIG. 2 illustrates an exemplary MRAM system 30 employing a STT-MTJ 32 and a sense amplifier 34. The STT-MTJ 32 represents only one of a plurality of bitcells within a memory column (not shown) in the MRAM system 30. Further, the sense amplifier 34 shown in FIG. 2 is provided for the memory column of the MRAM system 30 to read the bitcell within a memory row (not shown) selected by a word line 36 for the memory column during a memory access request. Data is stored in the STT-MTJ 32 according to the magnetic orientation between two layers: a free layer 38 disposed above a fixed or pinned layer 40. The free and pinned layers 38, 40 are separated by a tunnel junction 42 formed by a thin non-magnetic dielectric layer.
With continuing reference to FIG. 2, when reading data stored in the STT-MTJ 32, the word line 36 is activated for an access transistor 44 to allow current to flow through the STT-MTJ 32 between electrodes 46 and 48. To ensure that the data value stored within the STT-MTJ 32 is not disturbed during a read operation, a read bias generator 50 is used to control the current provided across the electrodes 46 and 48 when sensing using a bit line 52 and a voltage source 54. A low resistance, as measured by voltage applied on the bit line 52 divided by the measured current, is associated with a P orientation between the free and pinned layers 38, 40. A higher resistance is associated with an AP orientation between the free and pinned layers 38, 40. In particular, the sense amplifier 34 determines the presence of a low or high resistance by comparing the voltage or current of the bit line 52 with the voltage or current provided by a reference voltage supply 56. Thus, if a low resistance is measured, the sense amplifier 34 provides a logical ‘0’ to a sensed state output 58 representing a data value of logical ‘0’ stored within the STT-MTJ 32. Conversely, if a high resistance is measured, the sense amplifier 34 provides a logical ‘1’ to the sensed state output 58 representing a data value of logical ‘1’ stored within the STT-MTJ 32. Thus, the sense amplifier 34 in the MRAM system 30 plays a vital role in reading the data value stored in the STT-MTJ 32.
A current latch-based sense amplifier (CLSA) is one type of sense amplifier that can be used in resistive memory systems, such as the MRAM system 30 in FIG. 2, for example. The CLSA provides logical values as outputs by comparing the strength of a current on a bit line corresponding to a resistive bitcell to the current on a reference line. The logical value on a first CLSA output represents the state stored in the corresponding resistive bitcell, while the logical value on a second CLSA output represents the complement of the stored state. One advantage of the CLSA is that it does not cause read disturbance within a corresponding memory bitcell due to back injection of the sensing current. Such back injection is avoided in the CLSA because the bit line of the resistive bitcell is isolated from the sensing circuitry. However, one disadvantage of the CLSA is that it requires a long sensing time when the bit line of the corresponding bitcell has a lower current. A long sensing time can interfere with the stored state in the corresponding bitcell, thus causing read disturbance. Further, the CLSA has a limited sensing range because it is not useful for sensing at lower voltage levels. Such a limited sensing range causes the CLSA to possess a low tolerance range in relation to overcoming device mismatches of its internal transistors that can be caused by manufacturing process variations.
An alternative type of sense amplifier to a CLSA that can be used within resistive memory systems, such as the MRAM system 30 in FIG. 2 for example, is a voltage latch-based sense amplifier (VLSA). The VLSA can provide accurate and fast sensing at lower voltage levels. The VLSA provides logical values as outputs by comparing the strength of a voltage on a bit line corresponding to a resistive bitcell to that on a reference line. The logical value on a first VLSA output represents the state stored in a corresponding resistive bitcell, while the logical value on a second VLSA output represents the complement of the stored state. One disadvantage of the VLSA is that it may cause read disturbance within a corresponding resistive bitcell due to back injection of the sensing current. More specifically, the bit line of the resistive bitcell is not isolated from the sensing voltage within the VLSA, potentially allowing the sensing voltage to interfere with the state stored in the corresponding resistive bitcell. However, the VLSA provides particular advantages, as well. For example, unlike in the CLSA, the speed at which the bit line voltage of the resistive bitcell is sensed does not depend on the bit line voltage level. Therefore, the VLSA is capable of sensing at lower voltage levels, and thus has a larger sensing range. Such a large sensing range provides the VLSA with a high tolerance range in relation to device mismatches of its internal transistors caused by manufacturing process variations.
As previously described, the CLSA and the VLSA each possess their respective advantages and disadvantages. For example, while the CLSA does not suffer from read disturbance caused by back injection of the sensing current, it does not have a large tolerance range and may not perform as desired when sensing lower voltage levels. Conversely, the VLSA has a large tolerance range and performs well when sensing lower voltage levels, but it is susceptible to read disturbance caused by back injection. Thus, it would be advantageous to employ a sense amplifier with a large tolerance range that performs well when sensing lower voltage levels, and that also avoids read disturbance caused by back injection.